20.8–51 GHz highly balanced CMOS balun. Issue 17 (1st August 2017) - Yang, Geliang; Wang, Keping; Wang, Zhigong
Abstract : An ultra‐wideband asymmetric spiral‐stacked Marchand balun fabricated in the standard 0.18 μm CMOS process is demonstrated. An innovative technique named in‐phase current return path is incorporated into the design to enhance the balun's balance metrics. The proposed balun has a measured insertion loss <5 dB (3 dB for an ideal balun) and a return loss better than 10 dB from 20.8 to 60 GHz. Significantly, it provides a measured amplitude imbalance <0.3 dB and a phase imbalance <2° within 10–51 GHz range. The balun occupies an area of only 0.043 mm 2 without pads. The resultant highly balanced CMOS balun is shown as a high‐performing millimetre‐wave component suitable for the full Ka and/or Q band applications.