High swing PLL charge pump with current mismatch reduction. Issue 9 (1st April 2014)

• Record Type: Journal Article
• Authors: Joram, N.; Wolf, R.; Ellinger, F.
• Is Part Of: Electronics letters. Volume 50:Issue 9(2014)
• Page Start: 661
• Page End: 663
• Publication Date: 2014-04-01
• Subjects: phase locked loops -- CMOS analogue integrated circuits -- charge pump circuits; high swing PLL charge pump -- current mismatch reduction -- phase‐locked loops -- source currents -- sink currents -- dual compensation method -- CMOS technology -- resistance 140 kohm -- size 180 nm -- voltage 3 V; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2014.0804
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A compensated charge pump for use in phase‐locked loops (PLLs) is presented, which reaches several of the desired design goals for this type of circuit. The measured mismatch between the source and sink currents is below 2.1% for a large output voltage headroom of 83.3% of the supply, while still having a high output resistance of 140 kΩ. This behaviour is reached with a novel dual compensation method. The circuit was implemented in a 180 nm CMOS technology using a 3 V supply.