Digital predistortion architecture with reduced ADC dynamic range. Issue 6 (1st March 2016)

• Record Type: Journal Article
• Authors: Liu, Ying; Quan, Xin; Shao, Shihai; Tang, Youxi
• Is Part Of: Electronics letters. Volume 52:Issue 6(2016)
• Page Start: 435
• Page End: 437
• Publication Date: 2016-03-01
• Subjects: analogue‐digital conversion -- circuit feedback -- power amplifiers; digital predistortion architecture -- DPD architecture -- reduced ADC dynamic range -- feedback channel -- extra radio frequency chain -- analogue‐to‐digital converter -- PA output signal -- RF cancelling signal -- residual signal -- power amplifier output signal -- linear components; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2015.4174
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A digital predistortion (DPD) architecture is proposed with the dynamic range of the feedback channel being reduced. In this architecture, an extra radio frequency (RF) chain is deployed to cancel the linear components of the power amplifier (PA) output signal to reduce the dynamic range requirement on the analogue‐to‐digital converter (ADC) of the feedback channel. Subsequently in digital domain, the original PA output signal is estimated from both the digital replica of the RF cancelling signal and the acquired residual signal after cancellation, which is utilised to extract the DPD coefficients. Experimental results validate the effectiveness and superior performances of the proposed architecture, particularly with the number of ADC bits being reduced.