DC‐16 GHz GaAs track‐and‐hold amplifier using sampling rate and linearity enhancement techniques. Issue 2 (1st January 2018)

• Record Type: Journal Article
• Authors: Lin, Y.‐A.; Chang, H.‐Y.; Wang, Y.‐C.
• Is Part Of: Electronics letters. Volume 54:Issue 2(2018)
• Page Start: 83
• Page End: 85
• Publication Date: 2018-01-01
• Subjects: sample and hold circuits -- microwave amplifiers -- gallium arsenide -- III‐V semiconductors -- high electron mobility transistors -- distributed amplifiers; gallium arsenide track‐and‐hold amplifier -- sampling rate -- linearity enhancement technique -- THA -- enhancement‐mode gallium arsenide pseudomorphic HEMT process -- high‐electron mobility transistor process -- switched source follower -- SSF track‐and‐hold stage -- SSF T‐H stage -- input‐dependent timing jitter -- even harmonics -- differential topology -- spurious‐free dynamic range -- SFDR -- total harmonic distortion -- THD -- distributed amplifier -- source follower -- frequency 16 GHz -- size 0.15 mum; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2017.3372
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A DC‐16 GHz track‐and‐hold amplifier (THA) using 0.15‐μm enhancement‐mode GaAs pseudomorphic high‐electron mobility transistor process is presented. A switched source follower (SSF) track‐and‐hold (T/H) stage is modified to enhance the sampling rate and linearity. The input‐dependent timing jitter is highly reduced using the modified topology as compared to the conventional SSF T/H stage. Moreover, the even harmonics are successfully suppressed using the differential topology, and the spurious‐free dynamic range (SFDR) and total harmonic distortion (THD) are improved. To widen bandwidth (BW), the input and output buffers are designed using the distributed amplifier and source follower, respectively. With a sampling rate of 13.5 GS/s, the proposed THA features a measured 3‐dB BW of 16 GHz, an SFDR of 46 dB, and a THD of −45 dB.