Calculation of delivery rate in fault‐tolerant network‐on‐chips. Issue 7 (1st April 2016)

• Record Type: Journal Article
• Authors: Wang, Junshi; Huang, Letian; Li, Guangjun; Jantsch, Axel
• Is Part Of: Electronics letters. Volume 52:Issue 7(2016)
• Page Start: 546
• Page End: 548
• Publication Date: 2016-04-01
• Subjects: network‐on‐chip -- integrated circuit reliability -- mathematical analysis -- integrated circuit design -- Markov processes; fault‐tolerant network‐on‐chips -- on‐chip communication -- reliability design -- mathematic models -- Markov chain fault model -- fault‐tolerant configuration -- network traffic; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2015.2803
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : Reliability for network‐on‐chips has been widely researched in last decades not only to support the rapid growing requirement of on‐chip communication but also to address the challenge on reliability due to aggressive technology scaling. Simulation is the most common method to evaluate the capacity of reliability design but its cost is significant. Therefore, it is necessary to calculate the capacity for reliability of a design with light‐weight mathematic models. A model for faults on links is described to calculate the delivery rate of networks based on a Markov chain fault model, fault‐tolerant configuration and network traffic. The calculation results show accurate approximation of simulation results.