HD2 reduction technique for single‐ended amplifier. Issue 25 (1st December 2015)

• Record Type: Journal Article
• Authors: Sharma, S.; Khandelwal, S.; Ytterdal, T.; Niknejad, A.M.
• Is Part Of: Electronics letters. Volume 51:Issue 25(2015)
• Page Start: 2091
• Page End: 2092
• Publication Date: 2015-12-01
• Subjects: harmonic distortion -- harmonics suppression -- amplifiers -- triodes -- MOSFET; HD2 reduction technique -- single‐ended amplifier -- second harmonic distortion reduction -- front‐end receiver applications -- triode region -- MOSFET -- robust w r t -- tuning voltage -- power consumption -- metal oxide semiconductor field effect transistor; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2015.3306
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A new technique for second harmonic distortion (HD2) reduction is presented. The proposed technique can be very useful for front‐end receiver applications where single‐ended high‐gain, low‐distortion amplifiers are required. The theoretical analysis and simulations of this scheme in which the second derivative of the current can be cancelled by using an extra transistor biased in the triode region in parallel to a MOSFET in saturation is presented. This technique is also robust to process variations as a result of the use of a tuning voltage in the proposed design. A 9 dB reduction in the magnitude of HD2 has been achieved with this technique compared with an amplifier of similar power consumption. This technique can be used in a design without significant impact on area, power or noise performance.