High‐Q second‐order all‐pass delay network in CMOS. Issue 2 (3rd December 2018)
- Record Type:
- Journal Article
- Title:
- High‐Q second‐order all‐pass delay network in CMOS. Issue 2 (3rd December 2018)
- Main Title:
- High‐Q second‐order all‐pass delay network in CMOS
- Authors:
- Osuch, Piotr Jan
Stander, Tinus - Abstract:
- Abstract : Analogue signal processing (ASP) is a promising alternative to digital signal processing techniques in future telecommunication and data‐processing solutions. Second‐order all‐pass delay networks – the building blocks of ASPs – are currently primarily implemented in off‐chip planar media, which is unsuited for volume production. In this study, a novel on‐chip complementary metal–oxide–semiconductor (CMOS) second‐order all‐pass network is proposed that includes a post‐production tuning mechanism. It is shown that automated tuning with a genetic local optimiser can compensate for CMOS process variation and parasitics, which make physical realisation otherwise infeasible. Measurements indicate a post‐tuning bandwidth of 280 MHz, peak‐to‐nominal delay variation of 10 ns and magnitude variation of 3.1 dB. This is the first time that measurement results have been reported for an active inductorless on‐chip second‐order all‐pass network with a delay Q‐value larger than 1.
- Is Part Of:
- IET circuits, devices & systems. Volume 13:Issue 2(2019)
- Journal:
- IET circuits, devices & systems
- Issue:
- Volume 13:Issue 2(2019)
- Issue Display:
- Volume 13, Issue 2 (2019)
- Year:
- 2019
- Volume:
- 13
- Issue:
- 2
- Issue Sort Value:
- 2019-0013-0002-0000
- Page Start:
- 153
- Page End:
- 162
- Publication Date:
- 2018-12-03
- Subjects:
- CMOS analogue integrated circuits -- integrated circuit design -- signal processing -- delay circuits
analogue signal processing -- ASP -- data-processing solutions -- off-chip planar media -- post-production tuning mechanism -- post-tuning bandwidth -- peak-to-nominal delay variation -- digital signal processing -- on-chip complementary metal–oxide–semiconductor -- high-Q second-order all-pass delay network -- CMOS second-order all-pass network -- genetic local optimiser -- CMOS process variation -- active inductorless on-chip second-order all-pass network -- time 10.0 ns -- bandwidth 280.0 MHz
Electronic circuits -- Periodicals
Electronic systems -- Periodicals
621.381505 - Journal URLs:
- https://ietresearch.onlinelibrary.wiley.com/journal/17518598 ↗
http://ieeexplore.ieee.org/servlet/opac?punumber=4123966 ↗
http://www.theiet.org/ ↗
http://digital-library.theiet.org/content/journals/iet-cds ↗
http://www.ietdl.org/IET-CDS ↗ - DOI:
- 10.1049/iet-cds.2018.5252 ↗
- Languages:
- English
- ISSNs:
- 1751-858X
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 4363.252190
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 17383.xml