Different degradation mechanism by conduction region in AsTeGeSiN threshold switching device. Issue 22 (25th September 2020)
- Record Type:
- Journal Article
- Title:
- Different degradation mechanism by conduction region in AsTeGeSiN threshold switching device. Issue 22 (25th September 2020)
- Main Title:
- Different degradation mechanism by conduction region in AsTeGeSiN threshold switching device
- Authors:
- Choi, H.‐S.
- Abstract:
- Abstract : AsTeGeSiN threshold switching devices, which have recently gained attention for their reliable operation, are investigated for the degradation mechanism under constant voltage stress (CVS). Threshold switching devices are essential for 3D stacking of high‐density memories. The degradation mechanism can be divided into two conduction regions, i.e. before and after the threshold voltage ( V th ) by applying CVS. It is found that charge trapping, which can easily be recovered, is the main degradation mechanism in the low‐conduction region. This is because Poole–Frankel conduction by deep traps occurred in the low‐conduction region. However, trap generation may occur when going from deep traps to shallow traps, which is an important factor in the high‐conduction region stress voltage. Switching stress for different duty cycles in two conduction regions is also performed. Therefore, when operating an AsTeGeSiN threshold‐switching device as a selector, the read sequence is not a problem despite frequent usage. However, for the write sequence, reducing the number and duration of pulses helps extend the device's lifetime.
- Is Part Of:
- Electronics letters. Volume 56:Issue 22(2020)
- Journal:
- Electronics letters
- Issue:
- Volume 56:Issue 22(2020)
- Issue Display:
- Volume 56, Issue 22 (2020)
- Year:
- 2020
- Volume:
- 56
- Issue:
- 22
- Issue Sort Value:
- 2020-0056-0022-0000
- Page Start:
- 1202
- Page End:
- 1204
- Publication Date:
- 2020-09-25
- Subjects:
- germanium compounds -- random‐access storage -- electron traps -- Poole‐Frenkel effect -- three‐dimensional integrated circuits -- silicon compounds -- semiconductor switches -- arsenic compounds -- tellurium compounds
constant voltage stress -- CVS -- high‐density memories -- threshold voltage -- charge trapping -- degradation mechanism -- low‐conduction region -- Poole‐Frankel conduction -- deep traps -- trap generation -- shallow traps -- high‐conduction region stress voltage -- AsTeGeSiN threshold‐switching device -- 3D stacking -- high‐conduction regions -- AsTeGeSiN
Electronics -- Periodicals
621.381 - Journal URLs:
- http://digital-library.theiet.org/content/journals/el ↗
http://estar.bl.uk/cgi-bin/sciserv.pl?collection=journals&journal=00135194 ↗
https://ietresearch.onlinelibrary.wiley.com/loi/1350911x ↗
http://www.theiet.org/ ↗ - DOI:
- 10.1049/el.2020.1946 ↗
- Languages:
- English
- ISSNs:
- 0013-5194
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 3705.060000
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 17376.xml