Tree‐based scheme for reducing shared cache miss rate leveraging regional, statistical and temporal similarities. Issue 1 (1st January 2014)
- Record Type:
- Journal Article
- Title:
- Tree‐based scheme for reducing shared cache miss rate leveraging regional, statistical and temporal similarities. Issue 1 (1st January 2014)
- Main Title:
- Tree‐based scheme for reducing shared cache miss rate leveraging regional, statistical and temporal similarities
- Authors:
- Lenjani, Marzieh
Hashemi, Mahmoud Reza - Abstract:
- Abstract : Cache miss can have a major impact on overall performance of many‐core systems. A miss may result in extra traffic and delay because of coherency messages. This has been reduced in coarse‐grain coherency protocols where only shared misses require a coherency message. Conventional off‐chip methods manage the shared miss rate by relying on reuse histories. However the pertinent memory overhead that comes with reuse histories makes them impractical for on‐chip multi‐processor systems. In this study, a new scheme has been proposed to reduce shared cache miss rate in multi‐processor system‐on‐chips that benefits from novel prefetching techniques to L2 caches from off‐chip memories or other remote L2 caches located on‐chip. In the proposed scheme, the previously proposed Virtual Tree Coherence (VTC) method has been extended to limit block forwarding messages to true sharers within each region. Instead of relying on exact reuse histories, shared regions are searched for regional, temporal and statistical similarities. These similarities are exploited for determining the sharers that should receive the forwarded blocks. The proposed method has been evaluated with Splash‐2 workloads. Simulation results indicate that the proposed method has reduced shared miss count by up to 75%, and improved interconnect traffic by up to 47% compared with VTC.
- Is Part Of:
- IET computers & digital techniques. Volume 8:Issue 1(2014)
- Journal:
- IET computers & digital techniques
- Issue:
- Volume 8:Issue 1(2014)
- Issue Display:
- Volume 8, Issue 1 (2014)
- Year:
- 2014
- Volume:
- 8
- Issue:
- 1
- Issue Sort Value:
- 2014-0008-0001-0000
- Page Start:
- 30
- Page End:
- 48
- Publication Date:
- 2014-01-01
- Subjects:
- cache storage -- multiprocessing systems -- network‐on‐chip -- statistical analysis
tree‐based scheme -- shared cache miss rate reduction -- regional similarities -- statistical similarities -- temporal similarities -- many‐core systems -- coherency messages -- coarse‐grain coherency protocols -- off‐chip methods -- reuse histories -- reader set detection -- address sequence recurring -- on‐chip multiprocessor systems -- multiprocessor system‐on‐chips -- prefetching techniques -- off‐chip memories -- remote L2 caches -- virtual trees -- NoC -- network‐on‐chip -- Splash‐2 workloads
Computers -- Periodicals
Digital electronics -- Periodicals
Computer engineering -- Periodicals
Computer architecture -- Periodicals
Computer organization -- Periodicals
621.39 - Journal URLs:
- http://digital-library.theiet.org/content/journals/iet-cdt ↗
http://ieeexplore.ieee.org/servlet/opac?punumber=4117424 ↗
http://www.ietdl.org/IET-CDT ↗
https://ietresearch.onlinelibrary.wiley.com/journal/1751861x ↗
http://www.theiet.org/ ↗ - DOI:
- 10.1049/iet-cdt.2011.0066 ↗
- Languages:
- English
- ISSNs:
- 1751-8601
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 4363.252300
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 17393.xml