Low power analogue equaliser with adaptive digital tuning for fast ethernet. Issue 5 (22nd May 2020)

• Record Type: Journal Article
• Authors: Buhr, Simon; Xu, Xin; Kreißig, Martin; Matthus, Christian D.; Ellinger, Frank
• Is Part Of: IET circuits, devices & systems. Volume 14:Issue 5(2020)
• Page Start: 600
• Page End: 610
• Publication Date: 2020-05-22
• Subjects: CMOS integrated circuits -- digital control -- low-power electronics -- operational amplifiers -- twisted pair cables -- equalisers -- local area networks -- error statistics -- power consumption -- high-pass filters; low power analogue equaliser -- adaptive digital tuning -- unshielded twisted pair cables -- first-order high pass filters -- cable loss -- operational transconductance amplifiers -- digital control logic -- cable lengths -- bit error rate -- power consumption -- flat loss compensation -- fast Ethernet PHY chip -- multiinput OTA structure -- baseline wander -- CMOS technology -- size 180.0 nm -- size 120.0 m -- power 2.3 mW -- power 6.5 mW -- frequency 125.0 MHz -- time 250.0 mus; Electronic circuits -- Periodicals; Electronic systems -- Periodicals; 621.381505
• DOI: 10.1049/iet-cds.2019.0370
• Languages: English
• ISSNs: 1751-858X

Abstract

Abstract : This work presents an analogue equaliser with digital tuning. It compensates the losses introduced by up to 120 m long category 5 unshielded twisted pair cables and baseline wander (BLW). The equaliser is designed for Fast Ethernet with a symbol rate of 125 MHz. A gm ‐C filter, based on three first‐order high pass filters, is used to compensate the cable loss. To minimise power consumption, three operational transconductance amplifiers (OTAs) are merged into a novel multi‐input OTA structure. Additionally, a robust digital control logic is presented to automatically adjust the parameters of the equaliser for different cable lengths. A fast settling time below 250 µs is demonstrated for different scenarios. The equaliser is fabricated as part of a Fast Ethernet PHY chip in a 180 nm CMOS technology of GLOBALFOUNDRIES. Measurement results demonstrate error‐free data transmission (bit error rate below 10 −12 ) for cable lengths up to 120 m. The power consumption of the analogue equaliser ranges from 2.3 mW (short cable) to 6.5 mW (120 m cable). To the best of the authors' knowledge, this is the lowest power consumption of an analogue equaliser for Fast Ethernet, supporting additional BLW and flat loss compensation reported to date.