3–10 GHz noise‐cancelling CMOS LNA using gm‐boosting technique. Issue 1 (29th November 2017)

• Record Type: Journal Article
• Authors: Lee, Muyeon; Kwon, Ickjin
• Is Part Of: IET circuits, devices & systems. Volume 12:Issue 1(2018)
• Page Start: 12
• Page End: 16
• Publication Date: 2017-11-29
• Subjects: low-power electronics -- CMOS analogue integrated circuits -- low noise amplifiers -- field effect MMIC -- MMIC amplifiers -- impedance matching -- ultra wideband technology -- interference suppression; noise-cancelling CMOS LNA -- gm-boosting technique -- ultra-wideband low-noise amplifier -- UWB LNA -- common-gate input stage -- wideband input impedance matching -- common-source stage -- noise performance -- power consumption -- frequency 3 GHz to 10 GHz -- size 0.11 mum -- power 2.9 mW -- noise figure 16.5 dB to 17.6 dB -- power 8.3 mW -- noise figure 2.4 dB to 2.9 dB; Electronic circuits -- Periodicals; Electronic systems -- Periodicals; 621.381505
• DOI: 10.1049/iet-cds.2017.0094
• Languages: English
• ISSNs: 1751-858X

Abstract

Abstract : An ultra‐wideband (UWB) low‐noise amplifier (LNA) using a 0.11 µm CMOS technology is proposed. The common‐gate (CG) input stage for wideband input impedance matching and the common‐source (CS) stage for noise cancelling are applied. In the proposed LNA, the current of the CG input stage can be significantly reduced by applying the gm ‐boosting technique using the noise‐cancelling CS stage without additional amplifier, and the noise performance can be improved at the same power consumption. For low‐power operation, the LNA consumes 2.9 mW and achieves a noise figure (NF) of S 21 between 16.5 and 17.6 dB at S 11, lower than −12.4 and 3.6–3.7 dB at frequencies of 3–10 GHz. In low‐noise operation, the LNA consumes 8.3 mW, achieving S 11 of less than −10.7 dB, S 21 of 17.5–18.7 dB, and NF of 2.4–2.9 dB.