Differential capacitive pressure sensor design based on standard CMOS. Issue 11 (11th May 2017)

• Record Type: Journal Article
• Authors: Unigarro, E.; Bohórquez, J.C.; Achury, A.; Ramirez, F.; Sacristán, J.; Segura‐Quijano, F.
• Is Part Of: Electronics letters. Volume 53:Issue 11(2017)
• Page Start: 737
• Page End: 739
• Publication Date: 2017-05-11
• Subjects: pressure sensors -- pressure measurement -- capacitive sensors -- capacitance measurement -- CMOS integrated circuits -- microsensors -- electrochemical electrodes -- silicon -- elemental semiconductors -- finite element analysis -- electrostatics -- integrated circuit design; differential capacitive pressure sensor -- standard CMOS processing -- microelectromechanical system capacitive pressure sensor -- patent pending -- sensitive electrode -- reference electrode -- reference capacitor -- tridimensional model -- finite element solver -- coupled mechanical model -- electrostatic model -- complementary metal oxide silicon standard processing -- sacrificial material technique -- Si; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2017.0463
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A microelectromechanical system capacitive pressure sensor with a differential configuration (patent pending), including a reference and sensitive capacitor, is presented. A single cavity includes both reference and sensitive electrodes. This implementation is achieved by a size reduction of the sensitive electrode. A reduction of the 40% on the sensible electrode area represents a decrease in the sensor sensitivity of only 12.5%, and allows the reference capacitor implementation in the area commonly used only for the sensitive capacitor. A tridimensional model of the sensor was simulated using a finite‐element solver considering coupled mechanical and electrostatic models. The simulations show that this pressure sensor has a sensitivity of 4.2 fF/bar. The proposed pressure sensor designs use only materials available in complementary metal oxide silicon (CMOS) standard processes. A CMOS compatible post‐process, based on the sacrificial material technique and its restrictions is presented.