Investigation of RF and DC Performance of E-Mode In0.80Ga0.20As/InAs/In0.80Ga0.20as Channel based DG-HEMTs for Future Submillimetre Wave and THz Applications. Issue 3 (4th May 2021)

• Record Type: Journal Article
• Authors: Ajayan, J.; Ravichandran, T.; Mohankumar, P.; Prajoon, P.; Charles Pravin, J.; Nirmal, D.
• Is Part Of: IETE journal of research. Volume 67:Issue 3(2021)
• Page Start: 366
• Page End: 376
• Publication Date: 2021-05-04
• Subjects: Drain induced barrier lowering (DIBL) -- gate delay -- InAs -- quantum well (QW) -- short channel effects (SCEs) -- sub-threshold swing (SS); Electronics -- Periodicals; Telecommunication -- Periodicals; Electronics; Telecommunication; Periodicals; 621.38
• DOI: 10.1080/03772063.2018.1553641
• Languages: English
• ISSNs: 0377-2063

Abstract

ABSTRACT: In this paper, we systematically investigated the DC and RF behaviour of the novel Enhancement-Mode (E-Mode) Double-Gate High Electron Mobility Transistors (DGHEMTs) using Sentaurus-TCAD software. The scalability of the novel DGHEMT is also studied by analysing the short channel effects. The attractive features of the proposed DGHEMT are intrinsic In0.80 Ga0.20 As/InAs/In0.80 Ga0.20 As channel, dual silicon delta doping sheets and platinum (Pt) buried gate technology. The proposed DGHEMT with Lg = 20 nm exhibits a gm_max of 3970 mS/mm and IDS_max of 1650 mA/mm at VGS = 0.6 V and VDS = 0.8 V. The proposed DGHEMT exhibits a threshold voltage of 20 mV which indicates its E-Mode behaviour. The sub-threshold swing (SS) and DIBL values obtained for Lg = 20 nm DGHEMT at VDS = 0.5 V are 74 mV/dec and 78 mV/V respectively. The Lg = 20 nm proposed E-Mode DGHEMT also exhibit a fT and fmax of 826 and 1615 GHz respectively at VDS = 0.6 V. The computed logic gate delay for the Lg = 20 nm DGHEMT is 31.25 fS with an electron velocity under the gate of 6.4 × 10 7 cm/S. This excellent RF and DC behaviour of the proposed DGHEMT makes them an excellent choice for future sub-millimetre wave and THz frequency applications.