A Low-Complexity Decision Feedforward Equalizer Architecture for High-Speed Receivers on Highly Dispersive Channels. (12th May 2013)

• Record Type: Journal Article
• Authors: Pola, Ariel L.; Cousseau, Juan E.; Agazzi, Oscar E.; Hueda, Mario R.
• Other Names: Strollo Antonio G. M. Academic Editor.
• Is Part Of: Journal of electrical and computer engineering. Volume 2013(2013)
• Publication Date: 2013-05-12
• Subjects: Computer engineering -- Periodicals; Electrical engineering -- Periodicals; 621.3905
• DOI: 10.1155/2013/587108
• Languages: English
• ISSNs: 2090-0147

Abstract

Abstract : This paper presents an improved decision feedforward equalizer (DFFE) for high speed receivers in the presence of highly dispersive channels. This decision-aided equalizer technique has been recently proposed for multigigabit communication receivers, where the use of parallel processing is mandatory. Well-known parallel architectures for the typical decision feedback equalizer (DFE) have a complexity that grows exponentially with the channel memory. Instead, the new DFFE avoids that exponential increase in complexity by using tentative decisions to cancel iteratively the intersymbol interference (ISI). Here, we demostrate that the DFFE not only allows to obtain a similar performance to the typical DFE but it also reduces the compelxity in channels with large memory. Additionally, we propose a theoretical approximation for the error probability in each iteration. In fact, when the number of iteration increases, the error probability in the DFFE tends to approach the DFE. These benefits make the DFFE an excellent choice for the next generation of high-speed receivers.