The DFA/DFT‐based hacking techniques and countermeasures: Case study of the 32‐bit AES encryption crypto‐core. Issue 2 (2nd March 2021)
- Record Type:
- Journal Article
- Title:
- The DFA/DFT‐based hacking techniques and countermeasures: Case study of the 32‐bit AES encryption crypto‐core. Issue 2 (2nd March 2021)
- Main Title:
- The DFA/DFT‐based hacking techniques and countermeasures: Case study of the 32‐bit AES encryption crypto‐core
- Authors:
- Karmani, Mouna
Benhadjyoussef, Noura
Hamdi, Belgacem
Machhout, Mohsen - Abstract:
- Abstract: Integrated circuits (ICs) design plays a significant role in the embedded‐system performance, reliability and security. Thus, the constant advances in very large‐scale integration technology have led to design and manufacture of very complex ICs based on the System on a Chip (SoC) approach design. Therefore, the embedded system testing is considered earlier during the design process and testability is used as one of the objectives for evaluating safety‐critical embedded system designs. On the other hand, embedded systems used in critical applications execute security‐critical commands and collect sensitive data protected by cryptographic keys and authentication codes. The data and the unauthorised access of these embedded devices is an obvious target for attackers in order to obtain control or extract internal data. In this paper we consider that by using Design for Testability (DFT) approaches an attacker can control and affect a security‐critical embedded system. Thus, the authors focus on the DFT approach, as a means of violation of the security and confidentiality of embedded systems with security‐critical goals. In addition, with or without insertion of DFT circuitry, the crypto‐core is always exposed to the powerful differential fault analysis (DFA) attack. Here, a 32‐bit AES crypto‐core is used as a case study in order to analyse the DFA‐ and the DFT‐based Hacking techniques. A countermeasure was performed in order to avoid any scan or even DFA attackAbstract: Integrated circuits (ICs) design plays a significant role in the embedded‐system performance, reliability and security. Thus, the constant advances in very large‐scale integration technology have led to design and manufacture of very complex ICs based on the System on a Chip (SoC) approach design. Therefore, the embedded system testing is considered earlier during the design process and testability is used as one of the objectives for evaluating safety‐critical embedded system designs. On the other hand, embedded systems used in critical applications execute security‐critical commands and collect sensitive data protected by cryptographic keys and authentication codes. The data and the unauthorised access of these embedded devices is an obvious target for attackers in order to obtain control or extract internal data. In this paper we consider that by using Design for Testability (DFT) approaches an attacker can control and affect a security‐critical embedded system. Thus, the authors focus on the DFT approach, as a means of violation of the security and confidentiality of embedded systems with security‐critical goals. In addition, with or without insertion of DFT circuitry, the crypto‐core is always exposed to the powerful differential fault analysis (DFA) attack. Here, a 32‐bit AES crypto‐core is used as a case study in order to analyse the DFA‐ and the DFT‐based Hacking techniques. A countermeasure was performed in order to avoid any scan or even DFA attack attempt. … (more)
- Is Part Of:
- IET computers & digital techniques. Volume 15:Issue 2(2021)
- Journal:
- IET computers & digital techniques
- Issue:
- Volume 15:Issue 2(2021)
- Issue Display:
- Volume 15, Issue 2 (2021)
- Year:
- 2021
- Volume:
- 15
- Issue:
- 2
- Issue Sort Value:
- 2021-0015-0002-0000
- Page Start:
- 160
- Page End:
- 170
- Publication Date:
- 2021-03-02
- Subjects:
- Computers -- Periodicals
Digital electronics -- Periodicals
Computer engineering -- Periodicals
Computer architecture -- Periodicals
Computer organization -- Periodicals
621.39 - Journal URLs:
- http://digital-library.theiet.org/content/journals/iet-cdt ↗
http://ieeexplore.ieee.org/servlet/opac?punumber=4117424 ↗
http://www.ietdl.org/IET-CDT ↗
https://ietresearch.onlinelibrary.wiley.com/journal/1751861x ↗
http://www.theiet.org/ ↗ - DOI:
- 10.1049/cdt2.12013 ↗
- Languages:
- English
- ISSNs:
- 1751-8601
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 4363.252300
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 17063.xml