Inexact‐aware architecture design for ultra‐low power bio‐signal analysis. Issue 6 (1st November 2016)
- Record Type:
- Journal Article
- Title:
- Inexact‐aware architecture design for ultra‐low power bio‐signal analysis. Issue 6 (1st November 2016)
- Main Title:
- Inexact‐aware architecture design for ultra‐low power bio‐signal analysis
- Authors:
- Basu, Soumya
Garcia Del Valle, Pablo
Karakonstantis, Georgios
Ansaloni, Giovanni
Pozzi, Laura
Atienza, David - Abstract:
- Abstract : This study introduces an inexact, but ultra‐low power, computing architecture devoted to the embedded analysis of bio‐signals. The platform operates at extremely low voltage supply levels to minimise energy consumption. In this scenario, the reliability of static RAM (SRAM) memories cannot be guaranteed when using conventional 6‐transistor implementations. While error correction codes and dedicated SRAM implementations can ensure correct operations in this near‐threshold regime, they incur in significant area and energy overheads, and should therefore be employed judiciously. Herein, the authors propose a novel scheme to design inexact computing architectures that selectively protects memory regions based on their significance, i.e. their impact on the end‐to‐end quality of service, as dictated by the bio‐signal application characteristics. The authors illustrate their scheme on an industrial benchmark application performing the power spectrum analysis of electrocardiograms. Experimental evidence showcases that a significance‐based memory protection approach leads to a small degradation in the output quality with respect to an exact implementation, while resulting in substantial energy gains, both in the memory and the processing subsystem.
- Is Part Of:
- IET computers & digital techniques. Volume 10:Issue 6(2016)
- Journal:
- IET computers & digital techniques
- Issue:
- Volume 10:Issue 6(2016)
- Issue Display:
- Volume 10, Issue 6 (2016)
- Year:
- 2016
- Volume:
- 10
- Issue:
- 6
- Issue Sort Value:
- 2016-0010-0006-0000
- Page Start:
- 306
- Page End:
- 314
- Publication Date:
- 2016-11-01
- Subjects:
- electrocardiography -- medical signal processing -- SRAM chips -- quality of service
inexact‐aware architecture design -- ultra‐low power biosignal analysis -- inexact computing architecture design -- energy consumption minimisation -- voltage supply levels -- error correction codes -- SRAM implementations -- near‐threshold regime -- area overhead -- energy overhead -- end‐to‐end quality‐of‐service -- selective memory region protection -- biosignal application characteristics -- industrial benchmark application -- electrocardiogram power spectrum analysis -- significance‐based memory protection approach -- substantial energy gains -- processing subsystem
Computers -- Periodicals
Digital electronics -- Periodicals
Computer engineering -- Periodicals
Computer architecture -- Periodicals
Computer organization -- Periodicals
621.39 - Journal URLs:
- http://digital-library.theiet.org/content/journals/iet-cdt ↗
http://ieeexplore.ieee.org/servlet/opac?punumber=4117424 ↗
http://www.ietdl.org/IET-CDT ↗
https://ietresearch.onlinelibrary.wiley.com/journal/1751861x ↗
http://www.theiet.org/ ↗ - DOI:
- 10.1049/iet-cdt.2015.0194 ↗
- Languages:
- English
- ISSNs:
- 1751-8601
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 4363.252300
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 17054.xml