Continuous-Time ΣΔ ADC with Implicit Variable Gain Amplifier for CMOS Image Sensor. (18th February 2014)

• Record Type: Journal Article
• Authors: Tang, Fang; Bermak, Amine; Abbes, Amira; Amor Benammar, Mohieddine
• Other Names: Lee B. H. Academic Editor.; Yamauchi H. Academic Editor.
• Is Part Of: TheScientificWorldjournal. Volume 2014(2014)
• Publication Date: 2014-02-18
• Subjects: Science -- Periodicals; Technology -- Periodicals; Medicine -- Periodicals; 505
• DOI: 10.1155/2014/208540
• Languages: English
• ISSNs: 2356-6140

Abstract

Abstract : This paper presents a column-parallel continuous-time sigma delta (CTSD) ADC for mega-pixel resolution CMOS image sensor (CIS). The sigma delta modulator is implemented with a 2nd order resistor/capacitor-based loop filter. The first integrator uses a conventional operational transconductance amplifier (OTA), for the concern of a high power noise rejection. The second integrator is realized with a single-ended inverter-based amplifier, instead of a standard OTA. As a result, the power consumption is reduced, without sacrificing the noise performance. Moreover, the variable gain amplifier in the traditional column-parallel read-out circuit is merged into the front-end of the CTSD modulator. By programming the input resistance, the amplitude range of the input current can be tuned with 8 scales, which is equivalent to a traditional 2-bit preamplification function without consuming extra power and chip area. The test chip prototype is fabricated using 0.18 μ m CMOS process and the measurement result shows an ADC power consumption lower than 63.5 μ W under 1.4 V power supply and 50 MHz clock frequency.