Low power CMOS differential ring VCO designs using dual delay stages in 0.13 ​μm technology for wireless applications. (May 2021)

• Record Type: Journal Article
• Authors: Kumar, Nitin; Kumar, Manoj
• Is Part Of: Microelectronics journal. Volume 111(2021)
• Publication Date: 2021-05
• Subjects: Differential delay-stage -- Low power VCO -- I-MOS -- Phase noise -- Skewed delay technique; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2021.105025
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: This manuscript postulates two new designs of dual-delay stage for the four-stage CMOS differential ring voltage controlled oscillators (VCOs). Ring VCOs designs use dual-delay path techniques to achieve a wide tuning range with low power dissipation. The proposed VCOs are designed in TSMC 0.13 ​μm CMOS technology with a power supply of 1.3 ​V. VCO-1 generates tuning ranges from 5.188 to 7.932 ​GHz (41.82%), whereas its power dissipation varies from 1.853 to 2.711 ​mW by the change in control voltage from −1.0 ​V to 0 ​V. VCO-2 based on I-MOS varactors produces a tuning range from 4.918 to 7.268 ​GHz (38.56%) and dissipates the power from 1.853 ​mW to 2.711 ​mW. VCO-1 and VCO-2 exhibits phase-noise of −102.2 dBc/Hz and −99.5 dBc/Hz at 1 ​MHz offset from 5.834 ​GHz to 5.482 ​GHz central frequency, respectively. The figure-of-merit (FoM) of VCO-1 and VCO-2 circuit is −173.9 dBc/Hz and −171.2 dBc/Hz. Proposed VCO-1 and VCO-2 acquire an area of 247.62 μm 2 and 248.04 μm 2, respectively.