Design and analysis of all‐optical 1‐to‐2 line decoder based on linear photonic crystal. Issue 4 (1st August 2019)

• Record Type: Journal Article
• Authors: Mondal, Haraprasad; Sen, Mrinal; Goswami, Kamanashis
• Is Part Of: IET optoelectronics. Volume 13:Issue 4(2019)
• Page Start: 191
• Page End: 195
• Publication Date: 2019-08-01
• Subjects: photonic crystals -- optical logic -- light interference -- optical waveguide theory -- optical design techniques; linear photonic crystal -- 1-to-2 line all-optical logic decoder -- two-dimensional photonic crystal structure -- optical interference -- PhC waveguides -- optical bias -- high-logic states -- zero input conditions -- high contrast ratio -- output ports -- response times -- transient responses -- phase sensitivity analysis -- device output -- silicon-based design -- on-chip photonic-integrated-circuit applications -- all-optical 1-to-2 line decoder; Optoelectronics -- Periodicals; 621.36
• DOI: 10.1049/iet-opt.2018.5099
• Languages: English
• ISSNs: 1751-8768

Abstract

Abstract : A new design of 1‐to‐2 line all‐optical logic decoder has been proposed based on a two‐dimensional photonic crystal (PhC) structure. The decoder operates based on the principle of optical interference within the PhC waveguides. An optical bias has been used to generate high‐logic states at zero input conditions. Simulations explore a high contrast ratio, in the order of 11.3 dB, for both the output ports of the device. Response times have been calculated from the transient responses of the output ports, and are found as 0.65 and 0.77 ps for the ports 1 and 2, respectively. These results in a bit rate of ≃625 Gbps, considering the worst‐case scenario. Phase sensitivity analysis has also been performed which shows that the device output is quite sensitive to the differences in phases of the bias and signals. However, a strategy has been proposed to make the same insensitive to the phase changes. Finally, the small footprint (in the order of 234 μm 2 ); standard operating wavelength; and silicon‐based design of the decoder, along with its said merits, make the device highly potential for on‐chip photonic‐integrated‐circuit applications.