A 0D/3D Heterostructured All‐Inorganic Halide Perovskite Solar Cell with High Performance and Enhanced Phase Stability. Issue 48 (14th October 2019)

• Record Type: Journal Article
• Authors: Bai, Fujin; Zhang, Jie; Yuan, Yufei; Liu, Hongbin; Li, Xiaosong; Chueh, Chu‐Chen; Yan, He; Zhu, Zonglong; Jen, Alex K.‐Y.
• Is Part Of: Advanced materials. Volume 31:Issue 48(2019)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2019-10-14
• Subjects: 0D/3D heterostructured -- high performance -- inorganic perovskite -- phase stability -- solar cell; Materials -- Periodicals; Chemical vapor deposition -- Periodicals; 620.11
• DOI: 10.1002/adma.201904735
• Languages: English
• ISSNs: 0935-9648

Abstract

Abstract: Although organic–inorganic hybrid perovskite solar cells (PVSCs) have achieved dramatic improvement in device efficiency, their long‐term stability remains a major concern prior to commercialization. To address this issue, extensive research efforts are dedicated to exploiting all‐inorganic PVSCs by using cesium (Cs)‐based perovskite materials, such as α‐CsPbI3 . However, the black‐phase CsPbI3 (cubic α‐CsPbI3 and orthorhombic γ‐CsPbI3 phases) is not stable at room temperature, and it tends to convert to the nonperovskite δ‐CsPbI3 phase. Here, a simple yet effective approach is described to prepare stable black‐phase CsPbI3 by forming a heterostructure comprising 0D Cs4 PbI6 and γ‐CsPbI3 through tuning the stoichiometry of the precursors between CsI and PbI. Such heterostructure is manifested to enable the realization of a stable all‐inorganic PVSC with a high power conversion efficiency of 16.39%. This work provides a new perspective for developing high‐performance and stable all‐inorganic PVSCs. Abstract : A 0D Cs4 PbI6 /3D CsPbI3 heterostructure is achieved by tuning the stoichiometry of the precursors. The coexistent Cs4 PbI6 not only reduces the grain size of the CsPbI3 and serves as a molecular lock to stabilize the black‐phase CsPbI3, but also passivates the defects in the grain boundaries and improves the surface coverage to improve the device performance to 16.39%.