FPGA‐based real‐time implementation of a direct torque control with second‐order sliding mode control and input–output feedback linearisation for an induction motor drive. Issue 3 (3rd February 2020)

• Record Type: Journal Article
• Authors: Krim, Saber; Gdaim, Soufien; Mtibaa, Abdellatif; Faouzi Mimouni, Mohamed
• Is Part Of: IET electric power applications. Volume 14:Issue 3(2020)
• Page Start: 480
• Page End: 491
• Publication Date: 2020-02-03
• Subjects: feedback -- induction motor drives -- linearisation techniques -- invertors -- variable structure systems -- nonlinear control systems -- machine vector control -- torque control -- angular velocity control -- field programmable gate arrays -- stators -- control system synthesis -- observers -- control engineering computing -- power engineering computing -- robust control -- support vector machines; FPGA‐based real‐time implementation -- input–output feedback linearisation -- induction motor drive -- robust direct torque control strategy -- speed controller -- STSC -- sliding‐mode‐load torque -- stator‐flux observers -- stator resistance estimation -- nonlinear IOFL -- SVM technique -- SVM‐DTC‐IOFL scheme -- sliding mode observers -- stator flux -- stator resistance variations -- field‐programmable gate array circuit -- FPGA implementation -- control loop delay -- FPGA‐Virtex‐5‐ML507; Electric power -- Periodicals; Electric power systems -- Periodicals; 621.305
• DOI: 10.1049/iet-epa.2018.5829
• Languages: English
• ISSNs: 1751-8660

Abstract

Abstract : A robust direct torque control (DTC) strategy for an induction motor is proposed in this study. In fact, the proposed control strategy is defined by a combination of DTC, space vector modulation (SVM), input–output feedback linearisation (IOFL), a second‐order super‐twisting speed controller (STSC), and sliding‐mode‐load torque and stator‐flux observers with stator resistance estimation. First, non‐linear IOFL is suggested to achieve decoupled flux and torque control, and the SVM technique is utilised to control the inverter switching frequency which decreases the torque ripples and noise. Second, to improve the speed regulation, an STSC is added to an SVM‐DTC‐IOFL scheme. Furthermore, the sliding mode observers of the stator flux and of the load torque are proposed in order to improve the control performances by reducing uncertainties and to prevent the effects of the stator resistance variations. Indeed, this study presents the importance of implementing the suggested SVM‐DTC‐IOFL using a field‐programmable gate array (FPGA) circuit. The main interest of the FPGA implementation is the decrease in the control loop delay, due to the parallel processing offered by the FPGA. The performances of the proposed control algorithm are investigated by digital simulation using a Xilinx system generator tool and experimental implementation utilising FPGA‐Virtex‐5‐ML507.