Platform choices and design demands for IoT platforms: cost, power, and performance tradeoffs. Issue 1 (1st December 2016)

• Record Type: Journal Article
• Authors: Chen, Deming; Cong, Jason; Gurumani, Swathi; Hwu, Wen‐mei; Rupnow, Kyle; Zhang, Zhiru
• Is Part Of: IET cyber-physical systems. Volume 1:Issue 1(2016)
• Page Start: 70
• Page End: 77
• Publication Date: 2016-12-01
• Subjects: Internet of Things -- field programmable gate arrays -- microprocessor chips; Internet of Things -- IoT platforms -- self‐monitoring devices -- vending machines -- complex interactive devices -- artificial intelligence -- low‐performance CPU‐based commercial‐off‐the‐shelf systems -- high‐performance custom platforms -- computer aided design
• DOI: 10.1049/iet-cps.2016.0020
• Languages: English
• ISSNs: 2398-3396

Abstract

Abstract : The rise of the Internet of Things has led to an explosion of sensor computing platforms. The complexity and applications of IoT devices range from simple devices in vending machines to complex, interactive artificial intelligence in smart vehicles and drones. Developers target more aggressive objectives and protect market share through feature differentiation; they just choose between low‐cost, and low‐performance CPU‐based systems, and high‐performance custom platforms with hardware accelerators including GPUs and FPGAs. Both CPU‐based and custom designs introduce a variety of design challenges: extreme pressure on time‐to‐market, design cost, and development risk drive a voracious demand for new CAD technologies to enable rapid, low cost design of effective IoT platforms with smaller design teams and lower risk. In this article, we present a generic IoT device design flow and discuss platform choices for IoT devices to efficiently tradeoff cost, power, performance and volume constraints: CPU‐based systems and custom platforms that contain hardware accelerators including embedded GPUs and FPGAs. We demonstrate this design process through a driving application in computer vision. We also present current critical design automation needs for IoT development and demonstrate how our prior work in CAD for FPGAs and SoCs begin to address these needs.