Experimentally verified drain‐current model for variable barrier transistor. Issue 17 (5th August 2015) - Moldovan, O.; Lime, F.; Barraud, S.; Smaani, B.; Latreche, S.; Iñiguez, B.
Abstract : A simple analytical model for the computation of the drain current in a new type of transistor is presented, the variable barrier transistor (VBT). A good agreement between the results and experimental data, from two different VBTs, proves the accuracy of this model. The experimental measurements show that the I ON / I OFF ratio of this device can be improved, as compared with the classical transistor. The model correctly reproduces these results.