Low‐voltage power‐on‐reset circuit with least delay and high accuracy. Issue 11 (1st May 2015)

• Record Type: Journal Article
• Authors: Pandey, P.
• Is Part Of: Electronics letters. Volume 51:Issue 11(2015)
• Page Start: 856
• Page End: 858
• Publication Date: 2015-05-01
• Subjects: low‐power electronics -- system‐on‐chip -- logic circuits; low‐voltage power‐on‐reset circuit -- low‐voltage POR circuit -- power‐on‐reset signal generation -- SOC -- POR signal -- logical state -- digital systems -- bandgap voltage reference -- modified bandgap circuit -- supply‐dependent current -- reference generation -- trip point -- bandgap operation -- supply ramp rates -- logic circuit; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2014.4203
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A novel method for the generation of the power‐on‐reset (POR) signal needed by the SOC is described. A POR signal is required for initialisation of the logical state in digital systems. To obtain an accurate trip point for the POR, generally a bandgap voltage reference is used along with additional logic. Such logic tends to limit the lowest possible trip point that can be achieved. The proposed implementation of POR is based on a modified bandgap circuit where a supply‐dependent current is injected into the loop. In this case, the reference generation is not explicitly required and thus the trip point can be kept very close to the minimum supply required for the bandgap operation. This implementation also needs very small delay as the required delay is not dependent on supply ramp rates and can be made very small.