VLSI realisation of neural velocity integrator and central pattern generator. Issue 18 (1st September 2015)
- Record Type:
- Journal Article
- Title:
- VLSI realisation of neural velocity integrator and central pattern generator. Issue 18 (1st September 2015)
- Main Title:
- VLSI realisation of neural velocity integrator and central pattern generator
- Authors:
- Aggarwal, A.
- Abstract:
- Abstract : A very compact circuit for the head direction cell system is presented, which acts as the neural velocity integrator. This is useful in the implementation of robotic spatial navigation systems in hardware. In addition, the use of the circuit as a central pattern generator is also demonstrated, whose silicon implementation is useful in robotic gait control.
- Is Part Of:
- Electronics letters. Volume 51:Issue 18(2015)
- Journal:
- Electronics letters
- Issue:
- Volume 51:Issue 18(2015)
- Issue Display:
- Volume 51, Issue 18 (2015)
- Year:
- 2015
- Volume:
- 51
- Issue:
- 18
- Issue Sort Value:
- 2015-0051-0018-0000
- Page Start:
- 1405
- Page End:
- 1407
- Publication Date:
- 2015-09-01
- Subjects:
- VLSI -- integrating circuits -- gait analysis -- neural chips -- mobile robots
VLSI realisation -- neural velocity integrator -- central pattern generator -- head direction cell system -- robotic spatial navigation system -- robotic gait control -- very large scale integration
Electronics -- Periodicals
621.381 - Journal URLs:
- http://digital-library.theiet.org/content/journals/el ↗
http://estar.bl.uk/cgi-bin/sciserv.pl?collection=journals&journal=00135194 ↗
https://ietresearch.onlinelibrary.wiley.com/loi/1350911x ↗
http://www.theiet.org/ ↗ - DOI:
- 10.1049/el.2015.0544 ↗
- Languages:
- English
- ISSNs:
- 0013-5194
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 3705.060000
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 16582.xml