Low-power sector-based transition reduction bus encoding technique in SOC interconnects. (2nd July 2021)

• Record Type: Journal Article
• Authors: Chintaiah, N.; Reddy, G. Umamaheswara
• Is Part Of: International journal of computer aided engineering and technology. Volume 15:Number 2/3(2021)
• Page Start: 281
• Page End: 293
• Publication Date: 2021-07-02
• Subjects: deep submicron -- sector-based -- transitions -- crosstalk -- encoder; Computer-aided engineering -- Periodicals; 620.00285
• Languages: English
• ISSNs: 1757-2657

Abstract

The data word transmission process on an on-chip bus results in the switching of data bits on bus wires, which charges and discharges the capacitance associated with the wires. Consequently, dynamic power dissipation and increase in delay occurs. Data word transmission is required to change data values that are transmitted over these buses for reducing the transition activity, thereby decreasing the power consumption and delay of the bus. Bus encoding is the commonly used technique to reduce the transition activity of the bus. In this study about the memory bus encoding, i.e., a dynamic sector encoding technique, that is, a sector-based encoding technique is proposed. In this technique, the source word space is divided into a number of sectors with a unique identifier. A dynamic sector (DS) encoder reduces the number of transitions 19.23% more than that reduced by a binary encoder. DS encoding technique is a novel method that reduces the number of transition then reduces the power dissipation and delay when compared to previous encoding techniques which are used in the memory operations.