A bottom‐up approach to verifiable embedded system information flow security. Issue 1 (1st January 2014)

• Record Type: Journal Article
• Authors: Mu, Dejun; Hu, Wei; Mao, Baolei; Ma, Bo
• Is Part Of: IET information security. Volume 8:Issue 1(2014)
• Page Start: 12
• Page End: 17
• Publication Date: 2014-01-01
• Subjects: embedded systems -- formal verification -- instruction sets -- operating systems (computers) -- security of data; bottom up approach -- verifiable embedded system information flow security -- security holes -- access control -- data encryption -- information flow controls -- instruction set architecture -- operating system -- programming language -- input‐output architecture; Computer security -- Periodicals; Cryptography -- Periodicals; Computer networks -- Security measures -- Periodicals; Database security -- Periodicals; 005.8
• DOI: 10.1049/iet-ifs.2012.0342
• Languages: English
• ISSNs: 1751-8709

Abstract

Abstract : With the wide deployment of embedded systems and constant increase in their inter‐connections, embedded systems tend to be confronted with attacks through security holes that are hard to predict using typical security measures such as access control or data encryption. To eliminate these security holes, embedded security should be accounted for during the design phase from all abstraction levels with effective measures taken to prevent unintended interference between different system components caused by harmful flows of information. This study proposes a bottom‐up approach to designing verifiably information flow secure embedded systems. The proposed method enables tight information flow controls by monitoring all flows of information from the level of Boolean gates. It lays a solid foundation to information flow security in the underlying hardware and exposes the ability to prove security properties to all abstraction levels in the entire system stack. With substantial amounts of modifications made to the instruction set architecture, operating system, programming language and input/output architecture, the target system can be designed to be verifiably information flow secure.