Design criterion and guidelines for three‐phase asymmetric coupled inductors in interleaving DC/DC converter for VRM in data centres and POL. Issue 13 (21st September 2020)

• Record Type: Journal Article
• Authors: Yang, Yugang; Wu, Yanqiu; Sun, Xiaoyu; Han, Xiaoqing
• Is Part Of: IET power electronics. Volume 13:Issue 13(2020)
• Page Start: 2854
• Page End: 2865
• Publication Date: 2020-09-21
• Subjects: transient response -- DC‐DC power convertors -- voltage regulators -- voltage control -- inductors; commercial three phase CIs -- more phase CIs -- unequal phase self‐inductance -- steady‐state current ripple -- three‐phase ACIs -- design criterion -- design guidelines -- three‐phase interleaving BC prototype -- three‐phase interleaving BC's steady‐state phase current ripple -- three‐phase discrete inductors -- VRM -- POL -- faster transient output current response speed -- three‐phase asymmetric coupled inductors -- magnetically coupled inductors; Power electronics -- Periodicals; 621.31705
• DOI: 10.1049/iet-pel.2019.1451
• Languages: English
• ISSNs: 1755-4535

Abstract

Abstract : Multiphase interleaving buck DC/DC converters (BCs) with magnetically coupled inductors (CIs) have been researched to improve the performance of voltage regulator module (VRM) and point‐of‐load (POL). Commercial three or more phase CIs are asymmetric CIs (ACIs) offering unequal phase self‐inductance and unequal coupling between phases. By analysing the steady‐state current ripple and transient current response speed of three‐phase interleaving BCs with three‐phase ACIs, the design criterion and design guidelines for three‐phase ACIs are presented to simultaneously improve the steady‐state performance and transient performance of three‐phase interleaving BC with three‐phase ACIs. A three‐phase interleaving BC prototype with three‐phase ACIs is constructed. The experimental results show that three‐phase interleaving BC's steady‐state phase current ripple can reduce 45%, and its transient output current response speed can increase 63.9% simultaneously by using three‐phase ACIs instead of three‐phase discrete inductors, and with a smaller total core volume and higher efficiency. The results of this study can be used to design VRM in data centres and POL with smaller steady‐state phase current ripple, faster transient output current response speed, and higher efficiency.