Robust phase locked‐loop algorithm for single‐phase utility‐interactive inverters. Issue 5 (1st May 2014)

• Record Type: Journal Article
• Authors: Elrayyah, Ali; Sozer, Yilmaz; Elbuluk, Malik
• Is Part Of: IET power electronics. Volume 7:Issue 5(2014)
• Page Start: 1064
• Page End: 1072
• Publication Date: 2014-05-01
• Subjects: delay lock loops -- invertors -- phase locked loops -- power supply circuits -- power supply quality -- transient response; transport‐delay based phase‐lock loop algorithm -- TDPLL algorithm -- single phase utility interactive inverter -- transient response -- grid frequency variation effect -- harmonics pollution -- sag‐swell anomaly; Power electronics -- Periodicals; 621.31705
• DOI: 10.1049/iet-pel.2013.0351
• Languages: English
• ISSNs: 1755-4535

Abstract

Abstract : An accurate, robust and efficient transport‐delay based phase‐lock loop (TDPLL) algorithm is proposed for single phase utility interactive inverters. The traditional TDPLL has low complexity and its transient response is smooth, but its performance is significantly affected by the change in the grid frequency. The proposed TDPLL is designed to have robustness against grid frequency variations. The proposed method uses two delays instead of one to cancel the grid frequency variation effect. Since the grid voltage could be polluted by harmonics and may suffer from sag/swell anomalies, the proposed method is enhanced further to be robust against these sources of disturbances. Moreover, a method is proposed to tune the parameters of the system. The performance of the proposed PLL is validated through simulations and experimental results.