Novel three‐phase asymmetrical cascaded multilevel voltage source inverter. Issue 8 (1st September 2013)
- Record Type:
- Journal Article
- Title:
- Novel three‐phase asymmetrical cascaded multilevel voltage source inverter. Issue 8 (1st September 2013)
- Main Title:
- Novel three‐phase asymmetrical cascaded multilevel voltage source inverter
- Authors:
- Belkamel, Hamza
Mekhilef, Saad
Masaoud, Ammar
Abdel Naeim, Mohsen - Abstract:
- Abstract : Series connection of power cells in asymmetrical cascaded configurations helps to cancel redundant output levels and maximise the number of different levels generated by the inverter. A new configuration of three‐phase multilevel asymmetrical cascaded voltage source inverter is presented. This structure consists of series‐connected sub‐multilevel inverters blocks. The number of utilised switches, insulated gate driver circuits, voltage standing on switches, installation area and cost are considerably reduced. Cascaded‐cell DC voltages in each inverter leg form an arithmetic sequence with common difference of E . With the selected inverter DC sources, high‐frequency pulse‐width modulation (PWM) control methods can be effectively applied without loss of modularity. Low‐frequency and sinusoidal PWM techniques were successfully applied. Hence, high flexibility in the modulation of the proposed inverter is demonstrated. The prototype of the suggested inverter was manufactured and the obtained simulation and hardware results ensured the feasibility of the configuration, and the compatibility of both modulation techniques was accurately noted. Lastly, the semiconductor losses in the converter were calculated using simulation models. Based on the analysis of the total power losses, the proposed inverter provided high efficiency at different operating conditions.
- Is Part Of:
- IET power electronics. Volume 6:Issue 8(2013)
- Journal:
- IET power electronics
- Issue:
- Volume 6:Issue 8(2013)
- Issue Display:
- Volume 6, Issue 8 (2013)
- Year:
- 2013
- Volume:
- 6
- Issue:
- 8
- Issue Sort Value:
- 2013-0006-0008-0000
- Page Start:
- 1696
- Page End:
- 1706
- Publication Date:
- 2013-09-01
- Subjects:
- driver circuits -- losses -- power semiconductor switches -- PWM invertors -- switching convertors
three‐phase asymmetrical cascaded multilevel voltage source inverter -- series connection -- power cell -- redundant output level cancellation -- series‐connected submultilevel inverter block -- switch utilisation -- insulated gate driver circuit -- voltage standing -- cascaded‐cell DC voltage -- arithmetic sequence -- inverter DC source -- high‐frequency pulse‐width modulation control methods -- low‐frequency PWM technique -- sinusoidal PWM technique -- semiconductor loss -- simulation model -- power loss
Power electronics -- Periodicals
621.31705 - Journal URLs:
- http://digital-library.theiet.org/content/journals/iet-pel ↗
http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=4475725 ↗
https://ietresearch.onlinelibrary.wiley.com/journal/17554543 ↗
http://www.theiet.org/ ↗
http://www.ietdl.org/IET-PEL ↗ - DOI:
- 10.1049/iet-pel.2012.0508 ↗
- Languages:
- English
- ISSNs:
- 1755-4535
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 4363.253255
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 16488.xml