Design and Analysis of Power‐Efficient Quasi‐Adiabatic Ternary Content Addressable Memory (QATCAM). Issue 7 (7th September 2020)

• Record Type: Journal Article
• Authors: Durai, Jothi; Rajagopal, Sivakumar; Ganesan, Geetha
• Is Part Of: IET circuits, devices & systems. Volume 14:Issue 7(2020)
• Page Start: 923
• Page End: 928
• Publication Date: 2020-09-07
• Subjects: content‐addressable storage -- CMOS logic circuits -- low‐power electronics -- CMOS integrated circuits -- clocks -- integrated circuit design -- search engines; adiabatic logic scheme -- quasiadiabatic TCAM core cells -- complementary metal‐oxide semiconductor technology -- power clock -- QATCAM cells -- adiabatic TCAM arrays -- adiabatic peripheral circuits -- adiabatic TCAM core cells -- network search engines -- power‐efficiency quasiadiabatic ternary content addressable memory -- power‐efficiency TCAM -- size 180.0 nm -- voltage 1.8 V -- frequency 1.0 GHz; Electronic circuits -- Periodicals; Electronic systems -- Periodicals; 621.381505
• DOI: 10.1049/iet-cds.2019.0223
• Languages: English
• ISSNs: 1751-858X

Abstract

Abstract : Ternary content addressable memory (TCAM) is a high‐speed memory employed in network search engines which consume significant power. Many authors have provided efficient power solutions by proposing different match line schemes. This study proposes the use of energy recovering adiabatic logic scheme in the design of power‐efficient TCAM. Two different innovative quasi‐adiabatic TCAM (QATCAM) core cells are designed. The design is implemented in 180 nm complementary metal‐oxide semiconductor technology with a power clock of 1.8 V on Cadence Virtuoso. It is found that the power dissipated by the proposed QATCAM cells is lower than its conventional counterparts. Adiabatic TCAM arrays are designed using adiabatic peripheral circuits. The proposed adiabatic TCAM core cells yield more considerable power savings even at higher frequencies up to 1 GHz.