Approximate computing using frequency upscaling. Issue 7 (23rd October 2019)

• Record Type: Journal Article
• Authors: Huang, Junqi; Kumar, T. Nandha; Abbas, Haider; Lombardi, Fabrizio
• Is Part Of: IET circuits, devices & systems. Volume 13:Issue 7(2019)
• Page Start: 1018
• Page End: 1026
• Publication Date: 2019-10-23
• Subjects: discrete cosine transforms -- logic design -- adders -- approximation theory -- digital arithmetic; approximate computing -- frequency upscaling -- error resilient arithmetic designs -- adder cell -- arithmetic operation -- computational throughput -- exact adders -- exhaustive simulation -- inexact circuit -- inexact full adder -- exact circuit -- approximate DCT -- input frequency -- exact full adder -- peak signal-to-noise ratio -- mathematical modelling -- approximate discrete cosine transform -- technology nodes -- PSNR -- word length 4.0 bit -- word length 8.0 bit; Electronic circuits -- Periodicals; Electronic systems -- Periodicals; 621.381505
• DOI: 10.1049/iet-cds.2018.5422
• Languages: English
• ISSNs: 1751-858X

Abstract

Abstract : This study presents frequency upscaling as a technique for developing error resilient arithmetic designs in approximate computing whereby the input signal frequency of the circuit is upscaled beyond its largest operating value in generating errors in the arithmetic operation while speeding up the computational throughput. This study initially presents the mathematical modelling of frequency upscaling for both exact and inexact full adders. An exhaustive simulation and evaluation of 4 and 8 bits subtraction followed by addition of two images and approximate discrete cosine transform (DCT) is pursued using exact and inexact circuits when subjected to the proposed technique. The results estimated using the proposed model show good agreement with the simulation results. The normalised mean error distance of subtraction using an inexact circuit is close to the exact value for different technology nodes. The peak signal‐to‐noise ratio (PSNR) results for the addition of two images show that the inexact full adder achieves a higher output image quality than the exact circuit when the frequency is scaled up. Also, in an approximate DCT, the input frequency of an inexact full adder can be scaled up significantly higher than an exact full adder without a significant decrease in PSNR value.