9 ps TDC based on multiple sampling in 0.18 μm complementary metal–oxide–semiconductor. Issue 4 (30th April 2020)
- Record Type:
- Journal Article
- Title:
- 9 ps TDC based on multiple sampling in 0.18 μm complementary metal–oxide–semiconductor. Issue 4 (30th April 2020)
- Main Title:
- 9 ps TDC based on multiple sampling in 0.18 μm complementary metal–oxide–semiconductor
- Authors:
- Jin, Shuowei
Chai, Jiaxin
Li, Jingjiao
Yan, Aiyun - Abstract:
- Abstract : A high‐precision measurement method, based on multiple sampling, is proposed for the time interval of two signals in this study. A time interval measurement circuit integrated into the time‐to‐digital converter (TDC), is designed based on this high‐precision measurement method. In the TDC, the authors use two identical delay lines as the holding module to ensure the two signals with a constant time interval. The TDC samples the two signals multiple times by a clock signal, whose period is shorter than that of the delay line. Consequently, the problem of limited resolution caused by a mismatch between delay lines in the delay‐line structure can be avoided, and the precision of the output can be improved. The proposed TDC is designed and simulated in Semiconductor Manufacturing International Corporation (SMIC) 0.18 μm complementary metal–oxide–semiconductor process. Simulation results show that the differential non‐linearity and the integral non‐linearity are always less than one least significant bits. The proposed TDC achieves input dynamic range of 0–32.13 ns and time resolution of 9 ps.
- Is Part Of:
- IET circuits, devices & systems. Volume 14:Issue 4(2020)
- Journal:
- IET circuits, devices & systems
- Issue:
- Volume 14:Issue 4(2020)
- Issue Display:
- Volume 14, Issue 4 (2020)
- Year:
- 2020
- Volume:
- 14
- Issue:
- 4
- Issue Sort Value:
- 2020-0014-0004-0000
- Page Start:
- 459
- Page End:
- 463
- Publication Date:
- 2020-04-30
- Subjects:
- CMOS digital integrated circuits -- delay lines -- time-digital conversion -- integrated circuit design -- integrated circuit measurement -- signal sampling
time-to-digital converter -- high-precision measurement method -- identical delay lines -- constant time interval -- clock signal -- delay-line structure -- time resolution -- TDC -- multiple sampling -- time interval measurement circuit -- SMIC complementary metal–oxide–semiconductor process -- holding module -- signal sampling -- differential nonlinearity -- integral nonlinearity -- least significant bits -- time 0.0 ns to 32.13 ns -- time 9.0 ps -- size 0.18 mum
Electronic circuits -- Periodicals
Electronic systems -- Periodicals
621.381505 - Journal URLs:
- https://ietresearch.onlinelibrary.wiley.com/journal/17518598 ↗
http://ieeexplore.ieee.org/servlet/opac?punumber=4123966 ↗
http://www.theiet.org/ ↗
http://digital-library.theiet.org/content/journals/iet-cds ↗
http://www.ietdl.org/IET-CDS ↗ - DOI:
- 10.1049/iet-cds.2019.0242 ↗
- Languages:
- English
- ISSNs:
- 1751-858X
- Deposit Type:
- Legaldeposit
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- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 4363.252190
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