Symbiotic organisms search algorithm for optimal design of CMOS two‐stage op‐amp with nulling resistor and robust bias circuit. Issue 5 (12th July 2019)

• Record Type: Journal Article
• Authors: Ghosh, Sumalya; Prasad De, Bishnu; Kar, Rajib; Mal, Ashis Kumar
• Is Part Of: IET circuits, devices & systems. Volume 13:Issue 5(2019)
• Page Start: 679
• Page End: 688
• Publication Date: 2019-07-12
• Subjects: optimisation -- integrated circuit design -- low-power electronics -- search problems -- CMOS integrated circuits -- operational amplifiers -- VLSI -- MOSFET circuits; SOS algorithm -- CMOS two-stage op-amp -- robust bias circuit -- nulling resistor compensation -- complementary metal–oxide–semiconductor two-stage op-amp -- two-stage CMOS op-amp -- metal–oxide–semiconductor transistors -- op-amp circuits -- evolutionary technique -- SPICE simulation -- symbiotic organisms search algorithm -- analogue very-large-scale integration circuits -- MOS transistors -- power dissipation; Electronic circuits -- Periodicals; Electronic systems -- Periodicals; 621.381505
• DOI: 10.1049/iet-cds.2018.5259
• Languages: English
• ISSNs: 1751-858X

Abstract

Abstract : This study suggests an evolutionary technique namely symbiotic organisms search (SOS) algorithm based optimal designs of two different analogue very‐large‐scale integration circuits. The configurations considered here are nulling resistor compensation based complementary metal–oxide–semiconductor (CMOS) two‐stage op‐amp and two‐stage CMOS op‐amp with robust bias circuit. The prime goal of this work is the sizing of metal–oxide–semiconductor (MOS) transistors employing the SOS algorithm to optimise the area occupied by the individual circuit. Design results based on the SOS algorithm are authenticated with SPICE simulation. SPICE simulation results reveal that all the design specifications are firmly satisfied for both the circuits. Moreover, SPICE based results show that the SOS algorithm provides much better results compared to the earlier reported techniques regarding the gain, MOS area and power dissipation for the abovementioned op‐amp circuits.