A 16‐bit Hybrid ADC with Circular‐Adder‐Based Counting for 15μm Pitch 640×512 LWIR FPAs. Issue 2 (1st March 2020) - Huang, Zhaofeng; Zhu, Yajun; Lu, Wengao; Niu, Yuze; Zhang, Shengdong; Chen, Zhongjian
Abstract : A hybrid Analog to digital converter (ADC) is presented for long‐wave infrared focal plane arrays. A two‐stage quantization structure is applied in the folding integration process, which results in better chargehandling capacity and higher linearity compared with conventional designs while using fewer transistors at the pixel level. By employing a circular‐adder‐based counting structure with 3T dynamic memory cells, hardware consumption can be reduced. A pixel circuit of pitch 15μm has been designed using the 0.18mm Complementary metal‐oxide‐semiconductor (CMOS) process. The power consumption of the pixel‐level ADC is 0.214μW, and the charge‐handling capacity is 1Ge ‐ . Simulation results demonstrate a signal‐to‐noise ratio of 90dB and a nonlinearity of 0.11%.