FPGA based area-power-performance analysis of LMS filter using conventional and proposed multipliers. Issue 1 (March 2021) - Pathan, A; Memon, T D; Sohu, F Khan
Abstract: This paper compares LMS filter-based adaptive channel equalizer, implemented on Vertex 7 FPGA using several existing and proposed multipliers. The three main performance parameters taken into consideration are the consumed resources (in terms of lookup tables), utilized power (among various design components), and the performance achieved (in terms of observed frequency). The results show the area-power-performance tradeoff amongst the conventional and proposed multipliers based designs. It is to mention that the proposed multipliers result in more compact systems due to less utilization of resources in all means.