Reference voltage generation scheme enhancing speed and reliability for 1T1C‐type FRAM. Issue 3 (1st January 2014)

• Record Type: Journal Article
• Authors: Jia, Ze; Zhang, Gong; Liu, Jizhi; Liu, Zhiwei; Liou, Juin J.
• Is Part Of: Electronics letters. Volume 50:Issue 3(2014)
• Page Start: 154
• Page End: 156
• Publication Date: 2014-01-01
• Subjects: circuit reliability -- ferroelectric capacitors -- ferroelectric storage -- random‐access storage -- reference circuits; reference voltage generation scheme -- reliability -- 1T1C‐type FRAM -- 1T1C‐type ferroelectric random access memory -- ferroelectric capacitor; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2013.3193
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : An improved reference voltage generation scheme is proposed for a 1T1C‐type ferroelectric random access memory (FRAM), in which the circuit referring to reference cells is redefined and the data are written into reference cells at random between '1' and '0' depending on the voltages of the bitlines during every operation cycle. Compared with conventional schemes, it can not only realise higher access speed for memory, but also can enhance its reliability by resolving the imprint and relieving the fatigue relating to ferroelectric capacitors in the device. Functional verification for the experimental prototype utilising the proposed scheme has been implemented.