Simplified merged processing element for successive‐cancellation polar decoder. Issue 4 (1st February 2016)

• Record Type: Journal Article
• Authors: Yun, H.‐R.; Lee, H.
• Is Part Of: Electronics letters. Volume 52:Issue 4(2016)
• Page Start: 270
• Page End: 272
• Publication Date: 2016-02-01
• Subjects: codes -- forward error correction -- switching circuits -- adders; simplified merged processing element architectures -- successive‐cancellation polar decoder -- SMPE architectures -- sign‐magnitude conversion number reduction -- switch networks number reduction -- decrease hardware complexity -- technology scaled normalised throughput improvement -- forward error correction codes; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2015.3432
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : Novel simplified merged processing element (SMPE) architectures to design a low‐complexity successive‐cancellation (SC) polar decoder are presented. The proposed SMPE architectures reduce the number of sign‐magnitude conversions and switch networks, relative to those of the conventional merged processing element. Synthesis results show that the (1024, 512) SC polar decoder using the proposed SMPE architectures significantly decreases hardware complexity and improves technology scaled normalised throughput, as compared to those of the previously reported architectures.