Continuous‐flow variable‐length memoryless linear regression architecture. Issue 24 (1st November 2013)

• Record Type: Journal Article
• Authors: Garrido, M.; Grajal, J.
• Is Part Of: Electronics letters. Volume 49:Issue 24(2013)
• Page Start: 1567
• Page End: 1569
• Publication Date: 2013-11-01
• Subjects: adders -- dividing circuits -- logic design -- multiplying circuits -- regression analysis; dividers -- multipliers -- adders -- pipelined circuit -- continuous‐flow variable‐length memoryless linear regression architecture; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2013.2106
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A pipelined circuit to calculate linear regression is presented. The proposed circuit has the advantages that it can process a continuous flow of data, it does not need memory to store the input samples and supports variable length that can be reconfigured in run time. The circuit is efficient in area, as it consists of a small number of adders, multipliers and dividers. These features make it very suitable for real‐time applications, as well as for calculating the linear regression of a large number of samples.