Clock buffer with supply noise active compensation for reduced period jitter. Issue 18 (1st August 2013)

• Record Type: Journal Article
• Authors: Ravezzi, L.
• Is Part Of: Electronics letters. Volume 49:Issue 18(2013)
• Page Start: 1130
• Page End: 1131
• Publication Date: 2013-08-01
• Subjects: buffer circuits -- circuit noise -- clocks -- CMOS integrated circuits -- invertors; size 28 nm -- basic inverters -- CMOS technology -- reduced period jitter -- supply noise active compensation -- clock buffers; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2013.1178
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A simple circuit that actively compensates supply noise and reduces period jitter in CMOS clock buffers is presented. The locally sensed supply noise modulates a current injected in the buffer output node during transitions. By injecting the current in opposite phase to the supply noise, the transient variations are counterbalanced and the jitter removed. Designed in a 28 nm CMOS technology, a chain of 16 inverters using the proposed circuit shows a period jitter up to three times smaller than that of an equally long chain of basic inverters. Conventional local supply noise filtering would require approximately 70 times the area used by the proposed circuit to achieve similar performance.