First steps toward memory processor unit architecture based on SN P systems. Issue 6 (1st March 2017)

• Record Type: Journal Article
• Authors: Duchen, G.; Diaz, C.; Sanchez, G.; Perez, H.
• Is Part Of: Electronics letters. Volume 53:Issue 6(2017)
• Page Start: 384
• Page End: 385
• Publication Date: 2017-03-01
• Subjects: biocomputing -- memory architecture -- performance evaluation -- digital arithmetic -- high definition video -- video signal processing; memory processor unit architecture -- SN P systems -- spiking neural P systems -- memory bandwidth -- power consumption -- data processing -- data storing -- memory system design -- neural processing -- single neural P memory cells -- arithmetic operations -- neural MPU system -- high definition video processing; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2016.4148
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : During the last decade, an emerging branch of computer science (biologically inspired engineering) has been made intensive studies to create an efficient CPU based on spiking neural P systems. Most of these studies have been focused on developing theoretical neural arithmetic circuits that could be integrated into an arithmetic logic unit. However, the memory system has a significant relevance since modern computers demand large memory bandwidth affecting significantly their performance and power consumption. Recently, the use of memory processing units (MPUs) allows to increase their performance by processing and storing the data in the same unit. This work maybe considered as a first step toward the design of a memory system highly inspired by the neural processing of the soma, dendritic behaviour and astrocyte‐like control. In addition, the basic neural single neural (SN) P memory cells can compute intrinsically two basic arithmetic operations (addition and subtraction) that potentially allow the development of a neural MPU system without modifying the basic structure of the neural SN P memory cell. High definition video processing is one of the potential applications to apply the proposed neural MPU to increase the processing speed compared with existing approaches.