Time‐shifted excess loop delay compensation DAC for 2‐Ts delay in CT‐ΔΣ ADCs. Issue 12 (1st June 2017)

• Record Type: Journal Article
• Authors: Han, C.; Maghari, N.
• Is Part Of: Electronics letters. Volume 53:Issue 12(2017)
• Page Start: 775
• Page End: 777
• Publication Date: 2017-06-01
• Subjects: delta‐sigma modulation -- analogue‐digital conversion -- delay circuits -- mathematical analysis -- continuous time systems -- compensation; mathematical analysis -- time‐shifted differentiated DAC -- continuous‐time delta‐sigma modulators -- two‐sample excess loop delay compensation -- CT‐ΔΣ ADC -- time‐shifted excess loop delay compensation DAC; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2017.0628
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : This Letter proposes a new two‐sample excess loop delay compensation in continuous‐time delta‐sigma modulators using time‐shifted differentiated digital‐to‐analogue converter (DAC). This is done by using the information inherently available but ignored in the conventional methods, and therefore no additional hardware is required. Simulation results and mathematical analysis are provided to verify the effectiveness of the proposed structure.