Phase noise mitigation architecture for wireless full‐duplex transceivers. Issue 24 (1st November 2018)

• Record Type: Journal Article
• Authors: Quan, Xin; Pan, Wensheng; Liu, Ying; Tang, Youxi
• Is Part Of: Electronics letters. Volume 54:Issue 24(2018)
• Page Start: 1407
• Page End: 1409
• Publication Date: 2018-11-01
• Subjects: interference suppression -- radio networks -- radio transceivers -- analogue‐digital conversion -- phase noise -- oscillators; digital SI cancellation capability -- phase noise mitigation architecture -- novel transceiver architecture -- oscillator module -- receiver oscillator signal -- wireless full‐duplex transceivers; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2018.5684
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A novel transceiver architecture is proposed to mitigate the phase noise in the prevailing wireless full‐duplex transceivers. In this architecture, an oscillator module is designed to generate both the transmitter and the receiver oscillator signals from one single oscillator. Particularly, a digitally‐controlled delay module is used to control the delay of the receiver oscillator signal before mixing with the received signal at the down converter. By adjusting the delay value of the receiver oscillator signal, the power of residual self‐interference (SI) after digital SI cancellation can be minimised. Analytical and simulation results show that the digital SI cancellation capability of the proposed architecture can be 18 dB better than that of the conventional architecture of sharing one oscillator for transmitter and receiver.