Odd‐weight‐column SEC–DED–TAED codes. Issue 2 (1st January 2016)

• Record Type: Journal Article
• Authors: Liu, Shan Shan; Reviriego, Pedro; Sánchez‐Macián, Alfonso; Xiao, Liyi; Maestro, Juan Antonio
• Is Part Of: Electronics letters. Volume 52:Issue 2(2016)
• Page Start: 119
• Page End: 120
• Publication Date: 2016-01-01
• Subjects: error correction codes -- error detection codes -- integrated memory circuits -- parity check codes; odd‐weight‐column SEC–DED–TAED code -- single‐error correction double‐error detection code -- memory device protection -- parity‐check matrix -- even‐weight syndrome -- triple‐adjacent error detection -- triple‐adjacent detection logic -- avionics application -- space application; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2015.3535
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : Single‐error correction, double‐error detection (SEC–DED) codes are a type of error‐correction codes widely used in electronics to protect memory devices from data corruption. Odd‐weight‐column SEC–DED codes are a type of these codes where the parity‐check matrix is built with every column including an odd number of ones. With this approach, double errors have an even‐weight syndrome and can be differentiated from single errors and, consequently, easily detected. There are applications, such as avionics or space, where a multiple error usually affects adjacent cells. Adapting SEC–DED codes to protect against triple‐adjacent errors is interesting in these applications. A modification to existing odd‐weight‐column SEC–DED codes to add triple‐adjacent error detection (TAED), creating SEC–DED–TAED codes, is presented. The implementation of the additional triple‐adjacent detection logic for these codes can be performed with limited performance and area overhead.