Monolithic ultra‐low‐power 6 Gbit/s inductorless PRBS generator for silicon HBT‐based carrier‐injection electro‐absorption modulator. Issue 12 (1st June 2015)

• Record Type: Journal Article
• Authors: Fu, E.; Koomson, V.J.
• Is Part Of: Electronics letters. Volume 51:Issue 12(2015)
• Page Start: 921
• Page End: 923
• Publication Date: 2015-06-01
• Subjects: integrated optoelectronics -- random sequences -- silicon -- elemental semiconductors -- heterojunction bipolar transistors -- BiCMOS integrated circuits -- electro‐optical modulation -- electroabsorption -- current‐mode logic -- power consumption -- low‐power electronics; monolithic ultra‐low‐power inductorless PRBS generator -- silicon HBT‐ based carrier‐injection electro‐absorption modulator -- low‐power pseudorandom bit sequence generator -- high‐speed optical transmitter module -- bipolar CMOS process -- monolithic driver circuit architecture -- heterojunction bipolar transistor -- current mode logic latch -- power consumption -- current density -- dc power supply -- core circuit power consumption -- size 130 nm -- bit rate 10 Gbit/s to 6 Gbit/s -- power 0.6 mW to 42.75 mW -- voltage 1.5 V -- Si; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2015.0586
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A low‐power pseudo‐random bit sequence (PRBS) generator for testing a high‐speed optical transmitter module has been realised in a 130 nm bipolar CMOS process. The transmitter consists of a monolithic driver circuit architecture and a heterojunction bipolar transistor (HBT)‐based carrier‐injection electro‐absorption modulator. A 10 Gbit/s current mode logic latch with only 0.6 mW power consumption is designed by scaling down the current density without degrading the overall transmitter speed performance. The 2 7 −1 PRBS generator circuit consumes only 42.75 mW at 6 Gbit/s operating speeds with a 1.5 V dc power supply. The core circuit power consumption is 9 mW.