Design of controllable diode PL. Issue 20 (12th September 2016)

• Record Type: Journal Article
• Authors: Qi, Tian; He, Songbai
• Is Part Of: Electronics letters. Volume 52:Issue 20(2016)
• Page Start: 1712
• Page End: 1714
• Publication Date: 2016-09-12
• Subjects: limiters -- Schottky diodes -- network synthesis; controllable power limiter design -- parallel reverse polarities -- Schotty diode -- symmetry structure -- controllable bias voltages -- insertion loss -- frequency 1.9 GHz to 2.7 GHz; Electronics -- Periodicals; 621.381
• DOI: 10.1049/el.2016.1174
• Languages: English
• ISSNs: 0013-5194

Abstract

Abstract : A design of controllable power limiter (CPL) using parallel reverse polarities Schotty diode is introduced. The main characteristic of the proposed PL are controllable, be difference with traditional PLs, the turning point is controllable and depend on the applied bias voltages on the diodes. For verification, a CPL using symmetry structure, with two controllable bias voltages, operating range from 1.9 to 2.7 GHz is fabricated. The measured results proved the feasibility of design, with <3 dB small signal insertion loss during the whole bandwidth the PL can limit output power at the level under 12 dBm while the large input power ranges over 30 dBm.