Self-rectifying resistance switching memory based on a dynamic p–n junction. (2nd December 2020)

• Record Type: Journal Article
• Authors: Wu, Changjin; Li, Xiaoli; Xu, Xiaohong; Lee, Bo Wha; Chae, Seung Chul; Liu, Chunli
• Is Part Of: Nanotechnology. Volume 32:Number 8(2021)
• Publication Date: 2020-12-02
• Subjects: self-rectifying resistance switching -- lithium migration -- dynamic p–n junction -- sneak current -- crossbar array; Nanotechnology -- Periodicals; Nanotechnology -- Periodicals; Nanotechnology; Publications périodiques; Nanotechnologies; Periodicals; 620.5
• DOI: 10.1088/1361-6528/abc782
• Languages: English
• ISSNs: 0957-4484

Abstract

Abstract: Although resistance random access memory (RRAM) is considered as one of the most promising next-generation memories, the sneak-path issue is still challenging for the realization of high-density crossbar memory array. The integration of the rectifying effect with resistance switching has been considered feasible to suppress the sneaking current. Herein, we report a self-rectifying resistance switching (SR-RS) by a newly discovered Li ions migration induced dynamic p–n junction at the Li-doped ZnO and ZnO layer interface. The Au/Li–ZnO/ZnO/Pt structure exhibits a forming-free and stable resistance switching with a high resistance ratio of R OFF / R ON ∼ 10 4 and a large rectification ratio ∼10 6 . In the Li–ZnO/ZnO bilayer, the electric field drives the dissociation and recombination of the self-compensated L i Z n − − L i i + complex pairs ( L i Z n − : p-type substitutional defect; L i i + : n-type interstitial defect) through the transport of L i i + between the two layers, thereby induces the formation of a dynamic p–n junction. Using this structure as a memory stacking device, the maximum crossbar array size has been calculated to be ∼16 Mbit in the worst-case scenario, which confirms the potential of the proposed device structure for the selection-device free and high-density resistance random access memory applications.