Terrace-confined guided growth of high-density ultrathin silicon nanowire array for large area electronics. (9th April 2021)

• Record Type: Journal Article
• Authors: Xu, Shun; Hu, Ruijin; Wang, Junzhuan; Li, Zheyang; Xu, Jun; Chen, Kunji; Yu, Linwei
• Is Part Of: Nanotechnology. Volume 32:Number 26(2021)
• Publication Date: 2021-04-09
• Subjects: silicon nanowires -- guided growth control -- field effect transistors -- in-plane solid−liquid−solid mechanism; Nanotechnology -- Periodicals; Nanotechnology -- Periodicals; Nanotechnology; Publications périodiques; Nanotechnologies; Periodicals; 620.5
• DOI: 10.1088/1361-6528/abf0c9
• Languages: English
• ISSNs: 0957-4484

Abstract

Abstract: Ultrathin silicon nanowires (SiNWs) are ideal 1D channels to construct high performance nanoelectronics and sensors. We here report on a high-density catalytic growth of orderly ultrathin SiNWs, with diameter down to D nw = 27 ± 2 nm and narrow NW-to-NW spacing of only S nw ∼80 nm, without the use of high-resolution lithography. This has been accomplished via a terrace-confined strategy, where tiny indium (In) droplets move on sidewall terraces to absorb precoated amorphous Si layer as precursor and produce self-aligned SiNW array. It is found that, under proper parameter control, a tighter terrace-step confinement can help to scale the dimensions of the SiNW array down to the extremes that have not been reported before, while maintaining still a stable guiding growth over complex contours. Prototype SiNW field effect transistors demonstrate a high I on / I off current ratio ∼10 7, low leakage current of ∼0.3 pA and steep subthreshold swing of 220 mV dec −1 . These results highlight the unexplored potential of catalytic growth in advanced nanostructure fabrication that is highly relevant for scalable SiNW logic and sensor applications.