A low leakage TG‐CNTFET–based inexact full adder for low power image processing applications. (18th July 2019)

• Record Type: Journal Article
• Authors: Goyal, Candy; Ubhi, Jagpal Singh; Raj, Balwinder
• Is Part Of: International journal of circuit theory and applications. Volume 47:Number 9(2019)
• Page Start: 1446
• Page End: 1458
• Publication Date: 2019-07-18
• Subjects: ED (error distance) -- FA (full adder) -- PSNR (peak signal to noise ratio) -- RCA (ripple carry adder) -- TG‐CNTFET (top gate carbon nanotube field effect transistor); Electric circuit analysis -- Periodicals; 621.319205
• DOI: 10.1002/cta.2672
• Languages: English
• ISSNs: 0098-9886

Abstract

Summary: This paper presents a highly stable, low leakage inexact full adder (FA) which is based on top gate carbon nanotube field effect transistors (TG‐CNTFET) for motion detector applications. Inexact arithmetic circuits are highly accepted in low power multimedia applications. Circuit level metrics, ie, average power, propagation delay, power‐delay product (PDP), and leakage power dissipation as well as application level metric such as peak signal to noise ratio (PSNR) are considered to compare the performance of proposed inexact FA. All the simulations are performed using HSPICE tool with Stanford 32‐nm TG‐CNTFET model. The operating frequency used for simulation is 1‐Ghz with 0.9‐V supply voltage. Proposed inexact FA successfully achieve manifold reduction in leakage power as well as consume 89.2% lesser energy as compared with latest existing inexact FA while having other parameters in acceptable range. Simulations using MATLAB show satisfactory image quality and PSNR value for motion detection applications. The effect of variations in voltage and temperature on leakage power is also presented which confirms stability of the proposed circuit. Abstract : A low leakage TG‐CNTFET–based inexact adder is presented in this paper. Leakage power and PDP show significant reduction in the proposed design as compared with recently published inexact FA. The symmetrical structure of the proposed design makes it robust w.r.t. temperature and voltage variations. Application level metric such as PSNR confirms the use of the proposed design in future low power image processing applications.