A hierarchical architecture for increasing efficiency of large photovoltaic plants under non-homogeneous solar irradiation. (August 2019)

• Record Type: Journal Article
• Authors: Ngoc, Thanh Ngo; Sanseverino, Eleonora Riva; Quang, Ninh Nguyen; Romano, Pietro; Viola, Fabio; Van, Binh Doan; Huy, Hoang Nguyen; Trong, Thang Tran; Phung, Quang Nguyen
• Is Part Of: Solar energy. Volume 188(2019)
• Page Start: 1306
• Page End: 1319
• Publication Date: 2019-08
• Subjects: Mismatch -- Photovoltaic modules -- Optimization -- Reconfiguration; Solar energy -- Periodicals; Solar engines -- Periodicals; 621.47
• DOI: 10.1016/j.solener.2019.07.033
• Languages: English
• ISSNs: 0038-092X

Abstract

Graphical abstract: Highlights: Optimal design for PV plant. Switching matrix design. Switching operations balancing. Comparison between simulation and measures on a prototype reconfigurator. Abstract: Under non-homogeneous solar irradiation, photovoltaic (PV) panels receive different solar irradiance, resulting in a decrease in efficiency of the PV generation system. There are a few technical options to fix this issue that goes under the name of mismatch. One of these is the reconfiguration of the PV generation system, namely changing the connections of the PV panels from the initial configuration to the optimal one. Such technique has been widely considered for small systems, due to the excessive number of required switches. In this paper, the authors propose a new method for increasing the efficiency of large PV systems under non-homogeneous solar irradiation using Series-Parallel (SP) topology. In the first part of the paper, the authors propose a method containing two key points: a switching matrix to change the connection of PV panels based on SP topology and the proof that the SP-based reconfiguration method can increase the efficiency of the photovoltaic system up to 50%. In the second part, the authors propose the extension of the method proposed in the first part to improve the efficiency of large solar generation systems by means of a two-levels architecture to minimize the cost of fabrication of the switching matrix.